Inventor · Austin, TX, US

Rode R. Mora

12Patents

6h-index

23Co-inventors

58Inventor score

Filing activity: Oct 28, 2003 → Jul 13, 2012

Most-cited inventions

Patent	Title	Area	Cited by	Status
US6951783B2	Confined spacers for double gate transistor semiconductor fabrication process	Electricity	15	Expired
US7579243B2	Split gate memory cell method	Electricity	11	Active
US7125805B2	Method of semiconductor fabrication incorporating disposable spacer into elevated source/drain processing	Electricity	9	Expired
US7829447B2	Semiconductor structure pattern formation	Emerging Cross-Sectional Technologies	7	Active
US7528078B2	Process of forming electronic device including a densified nitride layer adjacent to an opening within a semiconductor layer	Electricity	6	Active
US7939880B2	Split gate non-volatile memory cell	Electricity	6	Active
US8513066B2	Method of making an inverted-T channel transistor	Electricity	4	Active
US8766362B2	Shallow trench isolation for SOI structures combining sidewall spacer and bottom liner	Electricity	2	Active
US8236638B2	Shallow trench isolation for SOI structures combining sidewall spacer and bottom liner	Electricity	2	Active
US7998822B2	Semiconductor fabrication process including silicide stringer removal processing	Electricity	1	Active
US7446006B2	Semiconductor fabrication process including silicide stringer removal processing	Electricity	0	Active
US7687370B2	Method of forming a semiconductor isolation trench	Emerging Cross-Sectional Technologies	0	Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.