Sagar Borikar
27Patents
3h-index
15Co-inventors
56Inventor score
Filing activity: Mar 17, 2014 → Aug 9, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US11625335B2 | Adaptive address translation caches | Physics | 20 | Active |
| US9965441B2 | Adaptive coalescing of remote direct memory access acknowledgements based on I/O characteristics | Physics | 9 | Active |
| US12040991B2 | Unlocking computing resources for decomposable data centers | Electricity | 9 | Active |
| US11336581B2 | Automatic rate limiting based on explicit network congestion notification in smart network interface card | Electricity | 3 | Active |
| US10929310B2 | Adaptive address translation caches | Physics | 3 | Active |
| US9317446B2 | Multi-level paging and address translation in a network environment | Physics | 3 | Active |
| US11601377B1 | Unlocking computing resources for decomposable data centers | Electricity | 2 | Active |
| US9548890B2 | Flexible remote direct memory access resource configuration in a network environment | Electricity | 2 | Active |
| US11080225B2 | Peer direct mechanism for direct memory access across host devices | Physics | 2 | Active |
| US10114792B2 | Low latency remote direct memory access for microservers | Physics | 2 | Active |
| US11632337B1 | Compute express link over ethernet in composable data centers | Electricity | 1 | Active |
| US10785161B2 | Automatic rate limiting based on explicit network congestion notification in smart network interface card | Electricity | 1 | Active |
| US10908841B2 | Increasing throughput of non-volatile memory express over fabric (NVMEoF) via peripheral component interconnect express (PCIe) interface | Electricity | 1 | Active |
| US9921970B2 | Multi-level paging and address translation in a network environment | Physics | 1 | Active |
| US9747240B2 | Dynamic connection of PCIe devices and functions to an array of hosts | Physics | 0 | Active |
| US12107770B2 | Compute express link over ethernet in composable data centers | Electricity | 0 | Active |
| US10114764B2 | Multi-level paging and address translation in a network environment | Physics | 0 | Active |
| US12360937B2 | Compute express Link™ (CXL) over ethernet (COE) | Physics | 0 | Active |
| US10872056B2 | Remote memory access using memory mapped addressing among multiple compute nodes | Emerging Cross-Sectional Technologies | 0 | Active |
| US11036649B2 | Network interface card resource partitioning | Electricity | 0 | Active |
| US9760513B2 | Low latency efficient sharing of resources in multi-server ecosystems | Physics | 0 | Active |
| US9892075B2 | Policy driven storage in a microserver computing environment | Emerging Cross-Sectional Technologies | 0 | Active |
| US11824793B2 | Unlocking computing resources for decomposable data centers | Electricity | 0 | Active |
| US10333865B2 | Transformation of peripheral component interconnect express compliant virtual devices in a network environment | Electricity | 0 | Active |
| US10949370B2 | Policy-driven storage in a microserver computing environment | Emerging Cross-Sectional Technologies | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.