Sanjiv Mathur
4Patents
3h-index
14Co-inventors
43Inventor score
Filing activity: Sep 24, 2012 → Jun 16, 2021
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8839171B1 | Method of global design closure at top level and driving of downstream implementation flow | Physics | 16 | Active |
| US8863058B2 | Characterization based buffering and sizing for system performance optimization | Physics | 5 | Active |
| US8782582B1 | Efficient method to analyze RTL structures that cause physical implementation issues based on rule checking and overlap analysis | Emerging Cross-Sectional Technologies | 3 | Active |
| US11704467B2 | Automated balanced global clock tree synthesis in multi level physical hierarchy | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.