Inventor · Singapore, SG

Sin Leng Lim

3Patents
1h-index
6Co-inventors
33Inventor score

Filing activity: Dec 22, 2006 → Jul 11, 2011

Most-cited inventions

PatentTitleAreaCited byStatus
US8264088B2 Planarized passivation layer for semiconductor devices Emerging Cross-Sectional Technologies 2 Active
US7829422B2 Integrated circuit having ultralow-K dielectric layer Electricity 0 Active
US7998831B2 Planarized passivation layer for semiconductor devices Emerging Cross-Sectional Technologies 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.