Inventor · San Jose, CA, US

Tarek Eldin

2Patents
1h-index
5Co-inventors
30Inventor score

Filing activity: Apr 1, 2004 → Jun 7, 2005

Most-cited inventions

PatentTitleAreaCited byStatus
US7246285B1 Method of automatic fault isolation in a programmable logic device Physics 5 Expired
US7373538B1 Method for determining interconnect line performance within an integrated circuit Physics 1 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.