Method for determining interconnect line performance within an integrated circuit
US7373538B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 7, 2005 |
| Grant date | May 13, 2008 |
| Priority date | — |
| Expiry date | Jul 9, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/31725
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A method for determining propagation delay differences for conductive lines of an integrated circuit is described. A first path is formed by coupling a first portion of conductive lines together. The first portion is associated with a first region of the integrated circuit. The first path is coupled in a ring oscillator, and a first delay is determined. A second path is formed by coupling a second portion of the conductive lines together. The second portion is the first portion except for at least a first conductive line in the first portion of the conductive lines being swapped for a second conductive line. The second conductive line is associated with a second region of the integrated circuit. The second path is coupled in the ring oscillator circuit. A second delay is determined, and an incremental difference between the first delay and the second delay may be determined.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.