Tei-Wei Kuo
46Patents
5h-index
60Co-inventors
68Inventor score
Filing activity: Jun 14, 2006 → Jul 26, 2022
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8010876B2 | Method of facilitating reliable access of flash memory | Physics | 16 | Active |
| US7975095B2 | Device and method for using a flash memory as a hard disk cache | Physics | 11 | Active |
| US7461233B2 | Method for identifying data characteristics for flash memory | Emerging Cross-Sectional Technologies | 10 | Active |
| US7917832B2 | Apparatus for improving data access reliability of flash memory | Physics | 7 | Active |
| US8356136B2 | Block management method of a non-volatile memory | Physics | 5 | Active |
| US8341336B2 | Region-based management method of non-volatile memory | Physics | 4 | Active |
| US9513815B2 | Memory management based on usage specifications | Physics | 4 | Active |
| US9025375B2 | Memory disturb reduction for nonvolatile memory | Physics | 4 | Active |
| US8392690B2 | Management method for reducing utilization rate of random access memory (RAM) used in flash memory | Physics | 3 | Active |
| US7461198B2 | System and method for configuration and management of flash memory | Physics | 3 | Active |
| US7890693B2 | Flash translation layer apparatus | Physics | 3 | Active |
| US9627072B2 | Variant operation sequences for multibit memory | Physics | 3 | Active |
| US9348748B2 | Heal leveling | Physics | 2 | Active |
| US8700839B2 | Method for performing static wear leveling on flash memory | Physics | 2 | Active |
| US7447870B2 | Device for identifying data characteristics for flash memory | Physics | 2 | Active |
| US9547586B2 | Metadata containers with indirect pointers | Physics | 1 | Active |
| US10049764B2 | Control method for memory device and memory controller | Physics | 1 | Active |
| US8010770B2 | Caching device for NAND flash translation layer | Physics | 1 | Active |
| US11354123B2 | Memory device and computing in memory method thereof | Physics | 1 | Active |
| US9305638B1 | Operation method for memory device | Physics | 1 | Active |
| US11594277B2 | Neural network computation method using adaptive data representation | Physics | 1 | Active |
| US7761648B2 | Caching method for NAND flash translation layer | Physics | 1 | Active |
| US9558108B2 | Half block management for flash storage devices | Physics | 1 | Active |
| US10108555B2 | Memory system and memory management method thereof | Physics | 0 | Active |
| US9501396B2 | Wear leveling with marching strategy | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.