Thomas E. Doane
7Patents
2h-index
21Co-inventors
47Inventor score
Filing activity: Dec 12, 1997 → Jul 9, 2015
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5837662A | Post-lapping cleaning process for silicon wafers | Electricity | 35 | Expired |
| US7323421B2 | Silicon wafer etching process and composition | Chemistry; Metallurgy | 13 | Expired |
| US8192822B2 | Edge etched silicon wafers | Emerging Cross-Sectional Technologies | 0 | Active |
| US9499920B2 | Methods for producing rectangular seeds for ingot growth | Emerging Cross-Sectional Technologies | 0 | Active |
| US9111745B2 | Methods for producing rectangular seeds for ingot growth | Emerging Cross-Sectional Technologies | 0 | Active |
| US8309464B2 | Methods for etching the edge of a silicon wafer | Emerging Cross-Sectional Technologies | 0 | Active |
| US9136185B2 | Methods and systems for grain size evaluation of multi-cystalline solar wafers | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.