Timothy Ayres
5Patents
5h-index
5Co-inventors
52Inventor score
Filing activity: Oct 23, 1997 → Jun 25, 2007
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6088823A | Circuit for efficiently testing memory and shadow logic of a semiconductor integrated circuit | Physics | 23 | Expired |
| US6360344B1 | Built in self test algorithm that efficiently detects address related faults of a multiport memory without detailed placement and routing information | Physics | 19 | Expired |
| US6263461A | Circuit for efficiently testing memory and shadow logic of a semiconductor integrated circuit | Physics | 13 | Expired |
| US7882410B2 | Launch-on-shift support for on-chip-clocking | Physics | 6 | Active |
| US6000050A | Method for minimizing ground bounce during DC parametric tests using boundary scan register | Physics | 5 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.