Method for minimizing ground bounce during DC parametric tests using boundary scan register
US6000050A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 23, 1997 |
| Grant date | Dec 7, 1999 |
| Priority date | — |
| Expiry date | Oct 23, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/318577
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
The method of controlling ground bounce during DC parametric tests disclosed herein is based on the formulation of tests that best achieve two broad goals. The first goal is to reduce the number of I/O pins that are switched simultaneously. In the formulation of the VIL and VIH tests this goal is implemented by preferably only switching one input at a time. The second goal is to simultaneously switch I/O pins that are distant from one another. In the formulation of the VOL and VOH tests this goal is implemented by partitioning the outputs into subsets and selecting preferably one and only one output at a time from each and every subset.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.