Inventor · Round Rock, TX, US

Todd Swanson

19Patents
5h-index
24Co-inventors
58Inventor score

Filing activity: Mar 23, 2005 → Dec 1, 2010

Most-cited inventions

PatentTitleAreaCited byStatus
US7627843B2 Dynamically interleaving randomly generated test-cases for functional verification Physics 44 Active
US7386636B2 System and method for communicating command parameters between a processor and a memory flow controller Physics 16 Active
US7895029B2 System and method of automating the addition of RTL based critical timing path counters to verify critical path coverage of post-silicon software validation tools Physics 6 Active
US7500039B2 Method for communicating with a processor event facility Physics 6 Active
US8229727B2 System and method for incorporating design behavior and external stimulus in microprocessor emulation model feedback using a shared memory Physics 6 Active
US7869459B2 Communicating instructions and data between a processor and external devices Electricity 5 Active
US7778271B2 Method for communicating instructions and data between a processor and external devices Electricity 5 Active
US8073669B2 Method and apparatus for detecting clock gating opportunities in a pipelined electronic circuit design Emerging Cross-Sectional Technologies 5 Active
US8244515B2 Structure for detecting clock gating opportunities in a pipelined electronic circuit design Emerging Cross-Sectional Technologies 4 Active
US7720667B2 Method and system for estimating power consumption of integrated circuitry Physics 3 Active
US8024489B2 System for communicating command parameters between a processor and a memory flow controller Physics 2 Active
US7913201B2 Structure for estimating power consumption of integrated circuitry Physics 2 Active
US7493468B2 Method for broadcasting instructions/data to a plurality of processors in a multiprocessor device via aliasing Physics 1 Active
US7930457B2 Channel mechanisms for communicating with a processor event facility Physics 1 Active
US8250338B2 Broadcasting instructions/data to a plurality of processors in a multiprocessor device via aliasing Physics 1 Active
US7509606B2 Method for optimizing power in a very large scale integration (VLSI) design by detecting clock gating opportunities Physics 0 Active
US8027825B2 Structure for testing an operation of integrated circuitry Physics 0 Active
US8006155B2 Testing an operation of integrated circuitry Physics 0 Active
US8370780B2 Method and system for estimating power consumption of integrated circuitry Physics 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.