Patent · US Active

Method and system for estimating power consumption of integrated circuitry

US8370780B2 · kind B2 · utility

0Cited by

15References

17Claims

0Family size

Assignee

International Business Machines Corporation · US

Inventors

Rajat Chaudhry · Austin, US
Tilman Gloekler · Schrobenhausen, DE
Daniel Stasiak · Rochester, US
Todd Swanson · Round Rock, US

Key dates

Filing date	Dec 1, 2010
Grant date	Feb 5, 2013
Priority date	—
Expiry date	Apr 18, 2031

Classification

Technology area (CPC G)Physics
CPC primaryG06F30/367
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A design structure is embodied in a machine readable medium for designing, manufacturing, or testing integrated circuitry. The design structure includes first hardware for executing first software in response to macros that describe the integrated circuitry, and for generating a set of constants in response to the execution of the first software. Second hardware is for receiving the set of constants from the first hardware, and for executing second software in response to the macros and the set of constants, and for estimating a power consumption of the integrated circuitry in response to the execution of the second software.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.