Vadali Mahadev
6Patents
3h-index
16Co-inventors
50Inventor score
Filing activity: Jun 19, 2003 → Sep 21, 2021
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7585702B1 | Structure and assembly procedure for low stress thin die flip chip packages designed for low-K Si and thin core substrate | Electricity | 29 | Active |
| US7210081B1 | Apparatus and methods for assessing reliability of assemblies using programmable logic devices | Physics | 7 | Expired |
| US7741160B1 | Structure and assembly procedure for low stress thin die flip chip packages designed for low-K Si and thin core substrate | Electricity | 5 | Active |
| US10048306B1 | Methods and apparatus for automated integrated circuit package testing | Physics | 3 | Active |
| US8212353B1 | Structure and assembly procedure for low stress thin die flip chip packages designed for low-K Si and thin core substrate | Electricity | 2 | Active |
| US12417331B2 | Systems and methods for circuit design dependent programmable maximum junction temperatures | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.