Apparatus and methods for assessing reliability of assemblies using programmable logic devices
US7210081B1 · kind B1 · utility
7Cited by
3References
55Claims
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Key dates
| Filing date | Jun 19, 2003 |
| Grant date | Apr 24, 2007 |
| Priority date | — |
| Expiry date | Mar 19, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/318516
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An apparatus performs reliability assessment of electronic hardware. The apparatus includes a test assembly. The test assembly includes at least one programmable logic device (PLD). The PLD is configured to provide a logic function, such as the function of a plurality of inverters coupled in a cascade manner. The apparatus further includes a signal source coupled to the test assembly. The signal source provides a stimulus signal to the test assembly. The apparatus also includes a signal monitor coupled to the test assembly. The signal monitor monitors a response signal generated by the test assembly.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.