Ying Keung
2Patents
2h-index
7Co-inventors
27Inventor score
Filing activity: May 2, 2001 → Jan 3, 2002
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6403485B1 | Method to form a low parasitic capacitance pseudo-SOI CMOS device | Electricity | 38 | Expired |
| US6544824B1 | Method to form a vertical transistor by first forming a gate/spacer stack, then using selective epitaxy to form source, drain and channel | Electricity | 5 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.