Memory management in virtualized computing systems having processors with more than two hierarchical privilege levels
US10002084B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 19, 2016 |
| Grant date | Jun 19, 2018 |
| Priority date | — |
| Expiry date | Dec 19, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/68
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An example method of memory management in a virtualized computing system includes: generating a page table hierarchy that includes address translations to first pages of memory that store kernel software and second pages of the memory that store user software; configuring a processor to: 1) implement a first address translation scheme, which uses a first virtual address width, for a hypervisor privilege level; 2) implement a second address translation scheme, which uses a second virtual address width, for supervisor and user privilege levels, where the first virtual address width is larger than the second virtual address width; and 3) use the page table hierarchy for each of the first and second address translation schemes; and executing the kernel software at the hypervisor privilege level and the user software at the user privilege level.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.