Ye Li
33Patents
2h-index
15Co-inventors
46Inventor score
Filing activity: Dec 19, 2016 → Dec 21, 2022
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US10002084B1 | Memory management in virtualized computing systems having processors with more than two hierarchical privilege levels | Physics | 16 | Active |
| US10552172B2 | Virtual appliance supporting multiple instruction set architectures | Physics | 3 | Active |
| US10642751B2 | Hardware-assisted guest address space scanning in a virtualized computing system | Physics | 2 | Active |
| US10282226B2 | Optimizing host CPU usage based on virtual machine guest OS power and performance management | Emerging Cross-Sectional Technologies | 2 | Active |
| US11880301B2 | Enabling efficient guest access to peripheral component interconnect express (PCIe) configuration space | Physics | 1 | Active |
| US10379870B2 | Supporting soft reboot in multi-processor systems without hardware or firmware control of processor state | Physics | 1 | Active |
| US10853284B1 | Supporting PCI-e message-signaled interrupts in computer system with shared peripheral interrupts | Physics | 1 | Active |
| US11561894B2 | Enabling efficient guest access to peripheral component interconnect express (PCIe) configuration space | Physics | 1 | Active |
| US10185664B1 | Method for switching address spaces via an intermediate address space | Physics | 1 | Active |
| US11436318B2 | System and method for remote attestation in trusted execution environment creation using virtualization technology | Physics | 0 | Active |
| US10776287B2 | Headless support using serial-based virtual consoles in a computing system | Physics | 0 | Active |
| US10922253B1 | Implementing interrupt remapping via input/output memory management unit faults | Physics | 0 | Active |
| US12039551B2 | System and method for implementing a consolidated contributions data bridge for outbound transient data and fixed-term reference data | Physics | 0 | Active |
| US11550609B2 | Unified hypercall interface across processors in virtualized computing systems | Physics | 0 | Active |
| US11210222B2 | Non-unified cache coherency maintenance for virtual machines | Physics | 0 | Active |
| US11263019B2 | Method for converting device tree data into ACPI data for edge device operating in a network | Physics | 0 | Active |
| US11042485B2 | Implementing firmware runtime services in a computer system | Physics | 0 | Active |
| US12007936B2 | Power efficient memory value updates for arm architectures | Physics | 0 | Active |
| US12248799B2 | Guest time scaling for a virtual machine in a virtualized computer system | Physics | 0 | Active |
| US12147530B2 | Deploying enclaves on different tee backends using a universal enclave binary | Physics | 0 | Active |
| US11954198B2 | Unifying hardware trusted execution environment technologies using virtual secure enclave device | Physics | 0 | Active |
| US11150933B2 | Optimizing host CPU usage based on virtual machine guest OS power and performance management | Emerging Cross-Sectional Technologies | 0 | Active |
| US12118362B2 | Behavioral implementation of a double fault stack in a computer system | Physics | 0 | Active |
| US11513825B2 | System and method for implementing trusted execution environment on PCI device | Physics | 0 | Active |
| US11113071B1 | Unified hypervisor image for multiple processor ISAs | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.