Method of forming structures with V shaped bottom on silicon substrate
US10002759B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 27, 2017 |
| Grant date | Jun 19, 2018 |
| Priority date | — |
| Expiry date | Jan 28, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/31111
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present disclosure generally relate to methods of processing a substrate in an epitaxy chamber. The method includes applying a passivating agent containing antimony to portions of a silicon substrate exposed through trenches formed in a dielectric layer on the silicon substrate, while applying the passivating agent containing antimony, exposing the silicon substrate to a group IV-containing precursor to form an epitaxial layer having a V-shaped structure having an exposed (111) plane at a bottom of the trenches, and forming a semiconductor layer on the epitaxial layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.