Dual epitaxial growth process for semiconductor device
US10002796B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 31, 2017 |
| Grant date | Jun 19, 2018 |
| Priority date | — |
| Expiry date | Mar 31, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0158
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a semiconductor device includes forming first and second fin structures on a substrate and a patterned polysilicon structure on first portions of the first and second fin structures. The method further includes depositing an insulating layer on second portions of the first and second fin structures and on the patterned polysilicon structure, which may be followed by selectively removing the insulating layer from the second portions and patterning a first hard mask layer on the second portion of the second fin structure. The method also includes growing a first epitaxial region on the second portion of the first fin structure, removing the patterned first hard mask layer from the second portion of the second fin structure, patterning a second hard mask layer on the first epitaxial region, and growing a second epitaxial region on the second portion of the second fin structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.