Method for fabricating an array of diodes, in particular for a non-volatile memory, and corresponding device
US10002906B2 · kind B2 · utility
1Cited by
4References
21Claims
0Family size
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Key dates
| Filing date | Nov 30, 2016 |
| Grant date | Jun 19, 2018 |
| Priority date | — |
| Expiry date | Nov 30, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/826
Abstract
The array of diodes comprises a matrix plane of diodes arranged according to columns in a first direction and according to rows in a second direction orthogonal to the first direction. The said diodes comprise a cathode region of a first type of conductivity and an anode region of a second type of conductivity, the said cathode and anode regions being superposed and disposed on an insulating layer situated on top of a semiconductor substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.