High accuracy leakage detection through low voltage biasing
US10008276B2 · kind B2 · utility
18Cited by
6References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 26, 2016 |
| Grant date | Jun 26, 2018 |
| Priority date | — |
| Expiry date | Jul 26, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/5006
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Techniques are presented for determining current leakage from a memory array or other circuit based on a low voltage path. For example, the technique can be applied to determine word line to word line leakage. By looking at a count for the clock used in regulating the low voltage output node, the amount of leakage can be determined. The leakage determination can be performed as part of test process or during normal memory operations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.