Methods of forming integrated circuit structure using extreme ultraviolet photolithography technique and related integrated circuit structure
US10014297B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 8, 2017 |
| Grant date | Jul 3, 2018 |
| Priority date | — |
| Expiry date | May 8, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
One aspect of the disclosure is directed to a method of forming an integrated circuit structure. The method may include: providing a set of fins over a semiconductor substrate, the set of fins including a plurality of working fins and a plurality of dummy fins, the plurality of dummy fins including a first subset of dummy fins within a pre-defined distance from any of the plurality of working fins, and a second subset of dummy fins beyond the pre-defined distance from any of the plurality of working fins; removing the first subset of dummy fins by an extreme ultraviolet (EUV) lithography technique; and removing at least a portion of the second subset of dummy fins.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.