Nanowire channel structures of continuously stacked nanowires for complementary metal oxide semiconductor (CMOS) devices

US10032678B2 · kind B2 · utility

Assignee

• QUALCOMM Incorporated · US

Inventors

• Jeffrey Junhao Xu · San Diego, US
• Stanley Seungchul Song · San Diego, US
• Da Yang · San Diego, US
• Vladimir Machkaoutsan · Leuven, BE
• Mustafa Badaroglu · Kessel-Lo, BE
• Choh Fei Yeap · San Diego, US

Key dates

• Filing date: Jun 30, 2016
• Grant date: Jul 24, 2018
• Expiry date: Jun 30, 2036

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/853
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Nanowire channel structures of continuously stacked nanowires for complementary metal oxide semiconductor (CMOS) devices are disclosed. In one aspect, an exemplary CMOS device includes a nanowire channel structure that includes a plurality of continuously stacked nanowires. Vertically adjacent nanowires are connected at narrow top and bottom end portions of each nanowire. Thus, the nanowire channel structure comprises a plurality of narrow portions that are narrower than a corresponding plurality of central portions. A wrap-around gate material is disposed around the nanowire channel structure, including the plurality of narrow portions, without entirely wrapping around any nanowire therein. The exemplary CMOS device provides, for example, a larger effective channel width and better gate control than a conventional fin field-effect transistor (FET) (FinFET) of a similar footprint. The exemplary CMOS device further provides, for example, a shorter nanowire channel structure than a conventional nanowire FET.