Circuits for and methods of transmitting data in an integrated circuit
US10038450B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 10, 2015 |
| Grant date | Jul 31, 2018 |
| Priority date | — |
| Expiry date | Aug 16, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M9/00
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A circuit for transmitting data in an integrated circuit device is described. The circuit comprises a first data width conversion circuit configured to receive a first portion of transmit data to be transmitted in parallel; a first parallel-in, serial-out circuit configured to receive an output of the first data width conversion circuit; a first reset timer configured to provide a first reset signal to enable resetting the first data width conversion circuit; a second data width conversion circuit configured to receive a second portion of the transmit data; a second parallel-in, serial-out circuit configured to receive an output of the second data width conversion circuit; and a second reset timer configured to provide a second reset signal to enable resetting the second data width conversion circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.