Using an integrated circuit die for multiple devices
US10043724B1 · kind B1 · utility
0Cited by
7References
9Claims
0Family size
Assignee
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Key dates
| Filing date | Nov 8, 2016 |
| Grant date | Aug 7, 2018 |
| Priority date | — |
| Expiry date | Nov 8, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/585
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In an example, a semiconductor assembly includes an integrated circuit (IC) die. The IC die includes a first region that includes a programmable fabric; a second region that includes input/output (IO) circuits; and a third region that includes a die seal disposed between the programmable fabric and the IO circuits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.