Patent · US Active

Stacked silicon package assembly having an enhanced lid

US10043730B2 · kind B2 · utility

12Cited by

3References

19Claims

0Family size

Assignee

XILINX, INC. · US

Inventors

Gamal Refai-Ahmed · Markham, CA
Tien-Yu Lee · San Jose, US
Ferdinand F. Fernandez · San Jose, US
Suresh Ramalingam · Fremont, US
Ivor G. Barber · Los Altos, US
Inderjit Singh · Saratoga, US
Nael Zohni · Campbell, US

Key dates

Filing date	Sep 28, 2015
Grant date	Aug 7, 2018
Priority date	—
Expiry date	Sep 28, 2035

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2924/35121
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A method and apparatus are provided which improve heat transfer between a lid and an IC die of an IC (chip) package. In one embodiment, a chip package is provided that includes a first IC die, a package substrate, a lid and a stiffener. The first IC die is coupled to the package substrate. The stiffener is coupled to the package substrate and circumscribes the first IC die. The lid has a first surface and a second surface. The second surface faces away from the first surface and towards the first IC die. The second surface of the lid is conductively coupled to the IC die, while the lid is mechanically decoupled from the stiffener.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.