Semiconductor device and method of forming the same
US10043807B1 · kind B1 · utility
4Cited by
5References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 4, 2017 |
| Grant date | Aug 7, 2018 |
| Priority date | — |
| Expiry date | Jul 4, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0184
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device and a method of forming the same, the semiconductor device includes a plural fin structures, two gates, a protection layer and an interlayer dielectric layer. The fin structures are disposed on a substrate. The two gates are disposed on the substrate across the fin structures. The protection layer is disposed on the substrate, surrounded sidewalls of the two gates. The interlayer dielectric layer is disposed on the substrate, covering the fin structures and the two gates.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.