Detection of gate-to-source/drain shorts

US10048311B2 · kind B2 · utility

Assignee

• GlobalFoundries Inc. · KY

Inventors

• Hans-Peter Moll · Dresden, DE
• Uwe Dersch · Radebeul, DE
• Ricardo P. Mikalo · Stadtroda, DE

Key dates

• Filing date: Sep 9, 2015
• Grant date: Aug 14, 2018
• Expiry date: Feb 6, 2036

Classification

• Technology area (CPC G): Physics
• CPC primary: G01R31/2884
• WIPO field: Measurement
• WIPO sector: Instruments

Abstract

A semiconductor test structure is provided for detecting raised source/drain regions-gate electrode shorts, including a semiconductor substrate, FETs formed on the semiconductor substrate, raised source/drain regions of the FETs formed on the semiconductor substrate, a gate electrode structure comprising multiple gate electrodes of the FETs arranged in parallel to each other, and a first electrical terminal electrically connected to the gate electrode structure, and wherein no electrical contacts to the raised source/drain regions are present between the multiple gate electrodes of the gate electrode structure.