Generation of network-on-chip layout based on user specified topological constraints
US10050843B2 · kind B2 · utility
3Cited by
93References
2Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 18, 2015 |
| Grant date | Aug 14, 2018 |
| Priority date | — |
| Expiry date | Sep 12, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/00
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
In an aspect, the present disclosure provides a method that comprises automatic generation of a NoC from specified topological information based on projecting NoC elements of the NoC onto a grid layout. In an aspect, the specified topological information, including specification of putting constraints on positions/locations of NoC elements and links thereof, can be input by a user in real space, and can then be projected on the grid layout.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.