Methods for producing interconnects in semiconductor devices
US10062607B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 22, 2016 |
| Grant date | Aug 28, 2018 |
| Priority date | — |
| Expiry date | Aug 22, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2221/1089
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for forming metallization in a workpiece includes electrochemically depositing a second metallization layer on the workpiece comprising a nonmetallic substrate having a dielectric layer disposed over a substrate and a continuous first metallization layer disposed on the dielectric layer and having at least one microfeature comprising a recessed structure, wherein the first metallization layer at least partially fills a feature on the workpiece, where the first metallization layer is a cobalt or nickel metal layer, and wherein the second metallization layer is a cobalt or nickel metal layer that is different from the metal of the first metallization layer, electrochemically depositing a copper cap layer after filling the feature, and annealing the workpiece to diffuse the metal of the second metallization layer into the metal of the first metallization layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.