SOI integrated circuit equipped with a device for protecting against electrostatic discharges
US10062681B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | May 10, 2017 |
| Grant date | Aug 28, 2018 |
| Priority date | — |
| Expiry date | May 10, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/201
Abstract
A protection device for protecting an IC against electrostatic discharge includes a buried insulant layer having a thickness that is no greater than fifty nanometers with bipolar transistors arranged thereon, one of which is NPN and the other of which is PNP. A base of one merges with a collector of the other. The transistors selectively conduct a discharge current between electrodes. A first semiconductor ground plane under the buried insulant layer is capable of being electrically biased and extends underneath the base of the first bipolar transistor. The ground plane and a base of one transistor have the same doping. However, its dopant density is at least tenfold greater than that of the base.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.