Three-dimensional memory device with enhanced mechanical stability semiconductor pedestal and method of making thereof
US10074666B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 9, 2017 |
| Grant date | Sep 11, 2018 |
| Priority date | — |
| Expiry date | Jan 9, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/50
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
After formation of an alternating stack of insulating layers and sacrificial material layers, a memory opening can be formed through the alternating stack, which is subsequently filled with a columnar semiconductor pedestal portion and a memory stack structure. Breakage of the columnar semiconductor pedestal portion under mechanical stress can be avoided by growing a laterally protruding semiconductor portion by selective deposition of a semiconductor material after removal of the sacrificial material layers to form backside recesses. At least an outer portion of the laterally protruding semiconductor portion can be oxidized to form a tubular semiconductor oxide spacer. Electrically conductive layers can be formed in the backside recesses to provide word lines for a three-dimensional memory device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.