Compound semiconductor field effect transistor gate length scaling
US10084074B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 7, 2017 |
| Grant date | Sep 25, 2018 |
| Priority date | — |
| Expiry date | Jul 7, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/877
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A compound semiconductor transistor may include a channel layer. The compound semiconductor transistor may also include a dielectric layer on the channel layer. The compound semiconductor transistor may further include a gate. The gate may include a vertical base portion through the dielectric layer and electrically contacting the channel layer. The gate may also include a head portion on the dielectric layer and electrically coupled to the vertical base portion of the gate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.