Method including a formation of a diffusion barrier and semiconductor structure including a diffusion barrier

US10090195B2 · kind B2 · utility

Assignee

• GlobalFoundries Inc. · KY

Inventors

• Frank Koschinsky · Radebeul, DE
• Bernd Hintze · Rohrbach, DE
• Heiko Weber · Pfungstadt, DE

Key dates

• Filing date: Sep 6, 2016
• Grant date: Oct 2, 2018
• Expiry date: Sep 6, 2036

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L23/53295
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A method includes forming a diffusion barrier over a semiconductor structure. The formation of the diffusion barrier includes performing a first tantalum deposition process, the first tantalum deposition process forming a first tantalum layer over the semiconductor structure, performing a treatment of the first tantalum layer, and performing a second tantalum deposition process after the treatment of the first tantalum layer. The treatment modifies at least a portion of the first tantalum layer. The second tantalum deposition process forms a second tantalum layer over the first tantalum layer.