Patent · US Active

Semiconductor package with interlocked connection

US10090216B2 · kind B2 · utility

0Cited by

12References

6Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Georg Meyer-Berg · Birkenfeld, DE
Reinhard Pufall · Birkenfeld, DE
Michael Goroll · Poing, DE
Rainer Dudek · Chemnitz, DE

Key dates

Filing date	Feb 24, 2017
Grant date	Oct 2, 2018
Priority date	—
Expiry date	Feb 24, 2037

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2924/35121
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A semiconductor package includes a block having opposing first and second main surfaces and sides between the first and second main surfaces, and an encapsulation material at least partly covering the block. One or both of the main surfaces of the block has recessed regions. The recessed regions do not extend completely through the block from one main surface to the other main surface. The encapsulation material fills the recessed regions to form an interlocked connection between the block and the encapsulation material. Additional semiconductor package embodiments are provided.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.