Patent · US Active

Semiconductor device and method of forming micro interconnect structures

US10090233B2 · kind B2 · utility

5Cited by

4References

18Claims

0Family size

Assignee

SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC · US

Inventors

Francis J. Carney · Mesa, US
Jefferson W. Hall · Chandler, US
Michael J. Seddon · Gilbert, US

Key dates

Filing date	Jul 25, 2016
Grant date	Oct 2, 2018
Priority date	—
Expiry date	Jul 25, 2036

Classification

Technology area (CPC H)Electricity
CPC primaryH10F39/806
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A semiconductor device has a first semiconductor die and second semiconductor die with a conductive layer formed over the first semiconductor die and second semiconductor die. The second semiconductor die is disposed adjacent to the first semiconductor die with a side surface and the conductive layer of the first semiconductor die contacting a side surface and the conductive layer of the second semiconductor die. An interconnect, such as a conductive material, is formed across a junction between the conductive layers of the first and second semiconductor die. The conductive layer may extend down the side surface of the first semiconductor die and further down the side surface of the second semiconductor die. An extension of the side surface of the first semiconductor die can interlock with a recess of the side surface of the second semiconductor die. The conductive layer extends over the extension and into the recess.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.