Semiconductor chip having a dense arrangement of contact terminals

US10090251B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Peter Ossimitz · Munich, DE
• Gottfried Beer · Nittendorf, DE
• Juergen Hoegerl · Regensburg, DE
• Andreas Munding · Regensburg, DE

Key dates

• Filing date: Jul 24, 2015
• Grant date: Oct 2, 2018
• Expiry date: Jul 24, 2035

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/3841
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A semiconductor chip includes a semiconductor body having an active device region, one or more metallization layers insulated from the semiconductor body and configured to carry one or more of ground, power and signals to the active device region, and a plurality of contact terminals formed in or disposed on an outermost one of the metallization layers and configured to provide external electrical access to the semiconductor chip. A minimum distance between adjacent ones of the contact terminals is defined for the semiconductor chip. One or more groups of adjacent ones of the contact terminals have an electrical or functional commonality and a pitch less than the defined minimum distance. A single shared solder joint can connect two or more of the contact terminals of the semiconductor chip to one or more of contact terminals of a substrate such as a circuit board, an interposer or another semiconductor chip.