Patent · US Active

Method for forming a field effect transistor device having an electrical contact

US10090393B2 · kind B2 · utility

1Cited by
1References
19Claims
0Family size

Assignee

Inventors

Key dates

Filing dateNov 8, 2016
Grant dateOct 2, 2018
Priority date
Expiry dateFeb 1, 2037

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D64/62
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A method for fabricating a semiconductor structure is provided. The method includes providing a patterned substrate comprising a semiconductor region and a dielectric region. A conformal layer of a first dielectric material is deposited directly on the patterned substrate. A layer of a sacrificial material is deposited overlying the conformal layer of the first dielectric material. The sacrificial material is patterned, whereby a part of the semiconductor region remains covered by the patterned sacrificial material. A layer of a second dielectric material is deposited on the patterned substrate, thereby completely covering the patterned sacrificial material. A recess is formed in the second dielectric material by completely removing the patterned sacrificial material. The exposed conformal layer of the first dielectric material is removed selectively to the semiconductor region.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.