Fin-based diode structures with a realigned feature layout
US10096587B1 · kind B1 · utility
4Cited by
2References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 26, 2017 |
| Grant date | Oct 9, 2018 |
| Priority date | — |
| Expiry date | Oct 26, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/811
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Diode structures and methods of fabricating diode structures. First and second gate structures are formed with the second gate structure arranged parallel to the first gate structure. First and second fins are formed that extend vertically from a top surface of a substrate. The first and second fins are arranged between the first gate structure and the second gate structure. A contact structure is coupled with the first fin and the second fin. The contact structure is laterally arranged between the first gate structure and the second gate structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.