Three-dimensional stacked junctionless channels for dense SRAM
US10096607B1 · kind B1 · utility
10Cited by
0References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 24, 2017 |
| Grant date | Oct 9, 2018 |
| Priority date | — |
| Expiry date | May 24, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/011
Abstract
A structure comprises a first channel region forming an n-channel device; a second channel region forming a p-channel device, the p-channel device being stacked with the n-channel device in a vertical orientation; a gate positioned around the stacked n-channel device and p-channel device; and at least one source region and at least one drain region extending from each of the n-channel device and the p-channel device. Each of the at least one source region and the at least one drain region within the stacked n-channel device and p-channel device are independently contacted.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.