Inventor · Hopewell Junction, NY, US

Rajasekhar Venigalla

82Patents
11h-index
70Co-inventors
77Inventor score

Filing activity: Sep 14, 2004 → Aug 7, 2023

Most-cited inventions

PatentTitleAreaCited byStatus
US9437503B1 Vertical FETs with variable bottom spacer recess Electricity 60 Active
US9530700B1 Method of fabricating vertical field effect transistors with protective fin liner during bottom spacer recess etch Electricity 49 Active
US9431305B1 Vertical transistor fabrication and devices Electricity 45 Active
US7056192B2 Ceria-based polish processes, and ceria-based slurries Electricity 39 Expired
US8415250B2 Method of forming silicide contacts of different shapes selectively on regions of a semiconductor device Electricity 34 Active
US9859421B1 Vertical field effect transistor with subway etch replacement metal gate Electricity 23 Active
US8643122B2 Silicide contacts having different shapes on regions of a semiconductor device Electricity 19 Active
US9728466B1 Vertical field effect transistors with metallic source/drain regions Electricity 18 Active
US9721848B1 Cutting fins and gates in CMOS devices Electricity 17 Active
US10083961B2 Gate cut with integrated etch stop layer Electricity 11 Active
US9761727B2 Vertical FETs with variable bottom spacer recess Electricity 11 Active
US10096607B1 Three-dimensional stacked junctionless channels for dense SRAM Electricity 10 Active
US9601491B1 Vertical field effect transistors having epitaxial fin channel with spacers below gate structure Electricity 9 Active
US10170584B2 Nanosheet field effect transistors with partial inside spacers Electricity 9 Active
US9293551B2 Integrated multiple gate length semiconductor device including self-aligned contacts Electricity 8 Active
US9978750B1 Low resistance source/drain contacts for complementary metal oxide semiconductor (CMOS) devices Electricity 7 Active
US8420491B2 Structure and method for replacement metal gate field effect transistors Electricity 7 Active
US9911804B1 Vertical fin field effect transistor with air gap spacers Electricity 5 Active
US11121317B2 Low resistance crosspoint architecture Electricity 5 Active
US10283416B2 Vertical FETS with variable bottom spacer recess Electricity 4 Active
US10109535B2 Method of fabricating vertical field effect transistors with protective fin liner during bottom spacer recess ETCH Electricity 4 Active
US10170485B2 Three-dimensional stacked junctionless channels for dense SRAM Electricity 4 Active
US10164119B2 Vertical field effect transistors with protective fin liner during bottom spacer recess etch Electricity 3 Active
US8557649B2 Method for controlling structure height Electricity 3 Active
US9941411B2 Vertical transistor fabrication and devices Electricity 2 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.