Event-based neural network with hierarchical addressing for routing event packets between core circuits of the neural network
US10102474B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 28, 2014 |
| Grant date | Oct 16, 2018 |
| Priority date | — |
| Expiry date | Mar 9, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06N3/049
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention provides a system comprising multiple core circuits. Each core circuit comprises multiple electronic axons for receiving event packets, multiple electronic neurons for generating event packets, and a fanout crossbar including multiple electronic synapse devices for interconnecting the neurons with the axons. The system further comprises a routing system for routing event packets between the core circuits. The routing system virtually connects each neuron with one or more programmable target axons for the neuron by routing each event packet generated by the neuron to the target axons. Each target axon for each neuron of each core circuit is an axon located on the same core circuit as, or a different core circuit than, the neuron.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.