Memory initialization
US10108376B1 · kind B1 · utility
2Cited by
4References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 4, 2017 |
| Grant date | Oct 23, 2018 |
| Priority date | — |
| Expiry date | May 4, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1048
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Circuits and methods for initializing a memory. Each row of the memory includes data bits and associated parity bits. A write buffer contains bit values for initializing the memory, and a control circuit performs a first set of write operations that write values from the write buffer to the data bits of the memory without writing values to the associated parity bits. The write buffer performs a second set of write operations that write values from the write buffer to the parity bits associated with the data bits without writing data to the data bits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.