Storing narrow produced values for instruction operands directly in a register map in an out-of-order processor
US10108417B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 21, 2015 |
| Grant date | Oct 23, 2018 |
| Priority date | — |
| Expiry date | Mar 14, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3858
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Storing narrow produced values for instruction operands directly in a register map in an out-of-order processor (OoP) is provided. An OoP is provided that includes an instruction processing system. The instruction processing system includes a number of instruction processing stages configured to pipeline the processing and execution of instructions according to a dataflow execution. The instruction processing system also includes a register map table (RMT) configured to store address pointers mapping logical registers to physical registers in a physical register file (PRF) for storing produced data for use by consumer instructions without overwriting logical registers for later executed, out-of-order instructions. In certain aspects, the instruction processing system is configured to write back (i.e., store) narrow values produced by executed instructions directly into the RMT, as opposed to writing the narrow produced values into the PRF in a write back stage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.