Methods of making semiconductor device packages and related semiconductor device packages
US10115715B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | May 23, 2017 |
| Grant date | Oct 30, 2018 |
| Priority date | — |
| Expiry date | May 23, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19105
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods of fabricating a semiconductor device package may involve providing a fan out wafer including semiconductor-device-package locations at a base level. Laterally offset semiconductor dice may be stacked at least some semiconductor-device-package locations of the fan out wafer to expose bond pads at a lateral periphery of each of the laterally offset semiconductor dice. The laterally offset semiconductor dice may be electrically connected to one another and associated electrically conductive traces of the at least some semiconductor-device-package locations. The semiconductor-device-package locations having stacks of semiconductor dice thereon may be singulated from the fan out wafer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.