Method of bonding semiconductor substrates
US10141284B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 24, 2017 |
| Grant date | Nov 27, 2018 |
| Priority date | — |
| Expiry date | May 24, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/83359
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The disclosed technology generally relates to semiconductor wafer bonding, and more particularly to direct bonding by contacting surfaces of the semiconductor wafers. In one aspect, a method for bonding a first semiconductor substrate to a second semiconductor substrate by direct bonding is described. The substrates are both provided on their contact surfaces with a dielectric layer, followed by a CMP step for reducing the roughness of the dielectric layer. Then a layer of SiCN is deposited onto the dielectric layer, followed by a CMP step which reduces the roughness of the SiCN layer to the order of 1 tenth of a nanometer. Then the substrates are subjected to a pre-bond annealing step and then bonded by direct bonding, possibly preceded by one or more pre-treatments of the contact surfaces, and followed by a post-bond annealing step, at a temperature of less than or equal to 250° C. It has been found that the bond strength is excellent, even at the above named annealing temperatures, which are lower than presently known in the art.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.