Method for manufacturing semiconductor memory device and semiconductor memory device
US10141329B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 23, 2017 |
| Grant date | Nov 27, 2018 |
| Priority date | — |
| Expiry date | Feb 23, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/31144
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
According to one embodiment, a method for manufacturing a semiconductor memory device includes simultaneously forming a plurality of first holes and a plurality of second holes in a stacked body. The stacked body includes a plurality of first layers and a plurality of second layers. The method includes etching a portion between the second holes next to each other in the stacked body, and connecting at least two or more second holes to form a groove. The method includes forming a film including a charge storage film on a sidewall of the first holes. The method includes forming a channel film on a sidewall of the film including the charge storage film.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.