Enhanced method of stressing a transistor channel zone

US10147818B2 · kind B2 · utility

Assignee

• COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES · FR

Inventors

• Shay Reboh · Grenoble, FR
• Benoit Mathieu · Grenoble, FR

Key dates

• Filing date: Nov 24, 2015
• Grant date: Dec 4, 2018
• Expiry date: Nov 24, 2035

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/038

Abstract

A method of straining a transistor channel zone is provided, including a) forming a plurality of stress blocks based on a material having an intrinsic stress, around a zone based on a semiconducting material in which a transistor channel will be made and on which a transistor gate will be formed, the stress blocks inducing a stress in the zone; b) forming a gate block on the zone, the gate block being disposed between the stress blocks; and c) at least partially removing the stress blocks without removing the gate block, wherein the gate block has a Young's modulus and a thickness such that the stress blocks are at least partially removed in step c) and the induced stress is at least partially maintained in the zone after the stress blocks are at least partially removed.