Methods of forming semiconductor structures
US10163682B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 24, 2017 |
| Grant date | Dec 25, 2018 |
| Priority date | — |
| Expiry date | May 24, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76251
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present disclosure relates to a process for the manufacture of a high resistivity semiconductor substrate, comprising the following stages: providing a first substrate with an in-depth weakened layer; providing a second substrate with a layer of an oxide at the surface; attaching the first substrate to the second substrate so as to form a compound substrate comprising a layer of buried oxide; and cleaving the compound substrate at the level of the weakened layer. The process additionally comprises at least one stage of stabilization, in particular, a stabilization heat treatment, of the second substrate with the layer of oxide before the stage of cleaving at the level of the weakened layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.