Device with diffusion blocking layer in source/drain region
US10164099B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 6, 2018 |
| Grant date | Dec 25, 2018 |
| Priority date | — |
| Expiry date | Feb 6, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/8325
Abstract
One illustrative device disclosed herein includes, among other things, a fin defined on a substrate. A gate electrode structure is positioned above the fin in a channel region. A source/drain region is defined in the fin. The source/drain region includes a first epitaxial semiconductor material. The first epitaxial semiconductor material includes a dopant species having a first concentration. A diffusion blocking layer is positioned above the first epitaxial semiconductor material. A second epitaxial semiconductor material is positioned above the diffusion blocking layer. The second epitaxial semiconductor material includes the dopant species having a second concentration greater than the first concentration.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.